1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a sputtering apparatus for forming a low-resistance uniform metal silicide layer that does not require a post heat treatment and a metal silicide layer forming method using the same.
2. Discussion of the Related Art
With the reduction in the geometrical size of semiconductor devices, the areas of gate and source/drain regions are decreasing. Along with this reduction in size, there is a need to reduce the bonding thickness of source/drain regions and the resulting high-resistance regions. To substantially lower the resistance in the source/drain regions at adjacent polysilicon regions, metal silicides are used for the electrical contacts between those regions. Such silicides, which may be of platinum, manganese, cobalt, or titanium, are formed wherever the source/drain regions are to come into contact with exposed polysilicon regions. The silicides are formed by depositing and then heating a thin metal layer having a high fusion point. Such a method for forming a metal silicide layer according to a related art is shown in FIGS. 1A-1D.
Referring to FIG. 1A, a semiconductor substrate 21 is divided into an active region and a device separating region. A device isolation layer 22 is formed on the semiconductor substrate 21 at the device separating region. Next, a gate electrode 24 is formed on the semiconductor substrate 21 at the active region via a conventional process after forming a gate oxide layer 23 on the semiconductor substrate 21. Subsequently, a lightly doped drain (LDD) region 25 is formed on a surface of the semiconductor substrate 21 at either lateral side of the gate electrode 24, an insulation sidewall 26 is formed at either lateral surface of the gate electrode 24, and a source/drain impurity region 27 is formed on the surface of the semiconductor substrate 21 at either lateral side of both the gate electrode 24 and the insulation sidewall 26, in this order, to achieve a transistor.
The semiconductor substrate 21 is then subjected to a washing process for removing various objects, such as metal impurities, organic pollutants, natural oxides, etc. Conventionally, the washing process is a chemical washing process using a standard cleaning 1 (SC1) solution and hydrofluoric (HF) or dilute hydrofluoric (DHF) solution. Here, the SC1 solution can be an organic matter having a mixing ratio of NH4OH:H2O2:H2O of 1:4:20.
Referring to FIG. 1B, a metal layer 28, for the formation of silicide, such as a cobalt layer, is formed on the surface of the semiconductor substrate 21 via a sputtering process, which is performed in a sputtering chamber of a sputtering apparatus.
Referring to FIG. 1C, the semiconductor substrate 21 is heat treated at a temperature of 400° C. to 600° C. in a particular apparatus, for example, a rapid thermal process apparatus or an electric furnace. As a result, a metal silicide layer 29 is formed on the semiconductor substrate 21 at positions corresponding to the gate electrode 24 and the source/drain impurity region 27. The metal silicide layer 29 is obtained as metal ions of the metal layer 28 react with silicon ions of the semiconductor substrate 21 and gate electrode 24 during the heat treatment. The metal layer 28 remains on the insulation sidewall 26 and device isolation layer 22 without reaction.
Referring to FIG. 1D, after removing the remained metal layer 28, which is not used to form the metal silicide film 29, the semiconductor substrate 21 is subjected to an annealing process at a predetermined temperature. This annealing process stabilizes the phase of the metal silicide layer 29, achieving the low-resistance metal silicide layer 29.
According to the method for forming a metal silicide layer as described above, however, the additional heat treatment step for forming the metal silicide layer requires transferring the semiconductor substrate with the deposited metal layer to the particular heating apparatus. Due to this additional heat treatment, the overall forming method is complex, requires an additional apparatus, and increases the cycling time of the lot in progress.